IBM EinsTimer, say company spokespeople, is the first commercial tool for incremental statistical timing analysis for electronic design automation (EDA). The suite can be licensed from IBM Engineering and Technology Services, which will also offer chip design services. The suite is easily integrated into existing design flows and does not require that licensees use IBM fabrication facilities. IBM fabrication facilities are, however, available to users. Statistical timing is expected to maximize chip performance and yield by returning probability distributions, sensitivity graphs, and yield curves. Statistical timing can show a designer how effectively a design will yield across a frequency range or can predict the worst possible performance over process variations. IBM is competing with EDA vendors such as Magma Design Automation and Extreme DATA, and could be competing with Cadence Design systems and Synopsys. Dale Hoffman, CTO of IBM Engineering and Technology Services, says EinsTimer will be very attractive to customers, since it includes support for front- and back-end environment variations. Quartz SSTA statistical timing analyzer includes extraction and library characterization and is in alpha release with early customers. Production release is forecast for later in 2005. Chandu Visweswariah of IBM says analog designs have used statistical methods for years, but that designers using EinsTimer have work with the understanding that what used to be a single number is now a probability distribution.